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AD9878-EB bảng dữ liệu(PDF) 1 Page - Analog Devices |
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1 / 36 page Mixed-Signal Front End for Broadband Applications AD9878 Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 © 2005 Analog Devices, Inc. All rights reserved. FEATURES Low cost 3.3 V CMOS MxFE™ for broadband applications DOCSIS, EURO-DOCSIS, DVB, DAVIC compliant 232 MHz quadrature digital upconverter 12-bit direct IF DAC (TxDAC+®) Up to 65 MHz carrier frequency DDS Programmable sampling clock rates Analog Tx output level adjust Dual 12-bit, 29 MSPS direct IF ADCs with video clamp input 10-bit, 29 MSPS sampling ADC 8-bit ∑-∆ auxiliary DAC Direct interface to AD832x family of PGA cable drivers APPLICATIONS Cable set-top boxes Cable and wireless modems FUNCTIONAL BLOCK DIAGRAM – I Q 12 TxID[5:0] Σ-∆ OUTPUT CA PORT MCLK OSCIN IF10 INPUT IF12B INPUT VIDEO IN IF12A INPUT CLAMP LEVEL Tx SDIO IF10[4:0] IF12[11:0] FLAG[2:1] Tx 16 DDS SINC–1 Σ -∆ 4 10 3 12 12 MUX ADC ADC ADC MUX MUX MUX DAC Σ CONTROL REGISTERS PLL Figure 1. GENERAL DESCRIPTION The AD9878 is a single-supply, cable modem/set-top box, mixed-signal front end. The device contains a transmit path interpolation filter, a complete quadrature digital upconverter, and a transmit DAC. The receive path contains dual 12-bit ADCs and a 10-bit ADC. All internally required clocks and an output system clock are generated by the phase-locked loop (PLL) from a single crystal oscillator or clock input. The transmit path interpolation filter provides an upsampling factor of 16× with an output signal bandwidth up to 4.35 MHz. Carrier frequencies up to 65 MHz with 26 bits of frequency tuning resolution can be generated by the direct digital synthesizer (DDS). The transmit DAC resolution is 12 bits and can run at sampling rates as high as 232 MSPS. Analog output scaling from 0 dB to 7.5 dB in 0.5 dB steps is available to preserve SNR when reduced output levels are required. The 12-bit ADCs provide excellent undersampling performance, allowing this device to typically deliver better than 10 ENOBs with IF inputs up to 70 MHz. The 12-bit IF ADCs can sample at rates up to 29 MHz, allowing them to process wideband signals. The AD9878 includes a programmable ∑-∆ DAC, which can be used to control an external component such as a variable gain amplifier (VGA) or a voltage controlled tuner. The AD9878 also integrates a CA port that enables a host processor to interface with the AD832x family of programmable gain amplifier (PGA) cable drivers or industry equivalent via the MxFE serial port (SPORT). The AD9878 is available in a 100-lead, LQFP package. The AD9878 is specified over the extended industrial (−40°C to +85°C) temperature range. |
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Mô tả tương tự - AD9878-EB |
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