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MC100ES7111FA bảng dữ liệu(PDF) 5 Page - Motorola, Inc |
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MC100ES7111FA bảng dữ liệu(HTML) 5 Page - Motorola, Inc |
5 / 8 page MC100ES7111 TIMING SOLUTIONS 5 MOTOROLA Table 6. AC Characteristics (VCC = 3.3V±5%, TJ = 0°C to + 110°C) a Symbol Characteristics Min Typ Max Unit Condition Clock input pair CLK0, CLK0 (HSTL/LVDS differential signals) VDIF Differential input voltagec (peak-to-peak) 0.4 V VX, IN Differential cross point voltaged 0.68 1.275 V fCLK Input Frequency 1000 TBD MHz tPD Propagation Delay CLK0 to Q[0-9] TBD ps Clock input pair CLK1, CLK1 (PECL differential signals) VPP Differential input voltagee (peak-to-peak) 0.2 1.0 V VCMR Differential input crosspoint voltagef 1 VCC-0.6 V fCLK Input Frequency 1000 MHz Differential tPD Propagation Delay CLK1 to Q[0-9] TBD ps Differential LVDS clock outputs (Q[0-9], Q[0-9]) tsk(O) Output-to-output skew 50 ps Differential tsk(PP) Output-to-output skew (part-to-part) TBD ps Differential tJIT(CC) Output cycle-to-cycle jitter TBD DCO Output duty cycle TBD 50 TBD % DCfref= 50% tr, tf Output Rise/Fall Time 0.05 TBD ns 20% to 80% tPDLg Output disable time 2.5 ⋅T + tPD 3.5 ⋅T + tPD ns T=CLK period tPLDh Output enable time 3 ⋅T + tPD 4 ⋅T + tPD ns T=CLK period a. AC characteristics are design targets and pending characterization. b. AC characteristics apply for parallel output termination of 50 Ω to VTT. c. VDIF (DC) is the minimum differential HSTL/LVDS input voltage swing required for device functionality. d. VX (DC) is the crosspoint of the differential HSTL/LVDS input signal. Functional operation is obtained when the crosspoint is within the VX (DC) range and the input swing lies within the VDIF (DC) specification. e. VPP (AC) is the minimum differential PECL input voltage swing required to maintain AC characteristics including tpd and device-to-device skew. f. VCMR (AC) is the crosspoint of the differential HSTL input signal. Normal AC operation is obtained when the crosspoint is within the VCMR (AC) range and the input swing lies within the VPP (AC) specification. Violation of VCMR (AC) or VPP (AC) impacts the device propagation delay, device and part-to-part skew. g. Propagation delay OE deassertion to differential output disabled (differential low: true output low, complementary output high). h. Propagation delay OE assertion to output enabled (active). |
Số phần tương tự - MC100ES7111FA |
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Mô tả tương tự - MC100ES7111FA |
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