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MC100EL30 bảng dữ liệu(PDF) 1 Page - ON Semiconductor |
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MC100EL30 bảng dữ liệu(HTML) 1 Page - ON Semiconductor |
1 / 3 page MOTOROLA SEMICONDUCTOR TECHNICAL DATA 4–1 REV 2 © Motorola, Inc. 1996 5/96 Triple D Flip-Flop With Set and Reset The MC100LVEL30 is a triple master–slave D flip flop with differential outputs. The MC100EL30 is pin and functionally equivalent to the MC100LVEL30 but is specified for operation at the standard 100E ECL voltage supply. Data enters the master latch when the clock input is LOW and transfers to the slave upon a positive transition on the clock input. In addition to a common Set input individual Reset inputs are provided for each flip flop. Both the Set and Reset inputs function asynchronous and overriding with respect to the clock inputs. • 1200MHz Minimum Toggle Frequency • 20–Lead SOIC Packaging • 550ps Typical Propagation Delays • Set and Reset Inputs • Supports both Standard and Low Voltage 100K ECL • Internal Input Pulldown Resistors • >2000V ESD Protection D1 Logic Diagram and Pinout: 20-Lead SOIC (Top View) R0 R1 D2 17 18 16 15 14 13 12 4 3 5 6 7 8 9 Q0 11 10 VCC Q1 Q1 VCC Q2 Q2 VEE D0 19 20 2 1 VCC Q0 CLK0 CLK1 S012 CLK2 R2 D R S Q Q D R S Q Q D R S Q Q MC100LVEL30 MC100EL30 R L L H L H TRUTH TABLE S L L L H H D L H X X X CLK Z Z X X X Q L H L H Undef Z = LOW to HIGH Transition DW SUFFIX PLASTIC SOIC PACKAGE CASE 751D–04 1 20 Q H L H L Undef PIN NAMES Function Data Inputs Reset Inputs Clock Inputs Common Set Input Pins D0–D2 R0–R2 CLK0–CLK2 S012 |
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