công cụ tìm kiếm bảng dữ liệu linh kiện điện tử
  Vietnamese  ▼
ALLDATASHEET.VN

X  

MC100LVEL14 bảng dữ liệu(PDF) 1 Page - ON Semiconductor

tên linh kiện MC100LVEL14
Giải thích chi tiết về linh kiện  1:5 Clock Distribution Chip
Download  4 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  ONSEMI [ON Semiconductor]
Trang chủ  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

MC100LVEL14 bảng dữ liệu(HTML) 1 Page - ON Semiconductor

  MC100LVEL14 Datasheet HTML 1Page - ON Semiconductor MC100LVEL14 Datasheet HTML 2Page - ON Semiconductor MC100LVEL14 Datasheet HTML 3Page - ON Semiconductor MC100LVEL14 Datasheet HTML 4Page - ON Semiconductor  
Zoom Inzoom in Zoom Outzoom out
 1 / 4 page
background image
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
4–1
REV 1
© Motorola, Inc. 1996
7/95
1:5 Clock Distribution Chip
The MC100LVEL/100EL14 is a low skew 1:5 clock distribution chip
designed explicitly for low skew clock distribution applications. The
device can be driven by either a differential or single-ended ECL or, if
positive power supplies are used, PECL input signal. The LVEL14 is
functionally and pin compatible with the EL14 but is designed to operate
in ECL or PECL mode for a voltage supply range of –3.0V to –3.8V ( or
3.0V to 3.8V). If a single-ended input is to be used the VBB output should
be connected to the CLK input and bypassed to ground via a 0.01
µF
capacitor. The VBB output is designed to act as the switching reference
for the input of the LVEL14 under single-ended input conditions, as a
result this pin can only source/sink up to 0.5mA of current.
The LVEL14 features a multiplexed clock input to allow for the
distribution of a lower speed scan or test clock along with the high speed
system clock. When LOW (or left open and pulled LOW by the input
pulldown resistor) the SEL pin will select the differential clock input.
The common enable (EN) is synchronous so that the outputs will only
be enabled/disabled when they are already in the LOW state. This avoids
any chance of generating a runt clock pulse when the device is
enabled/disabled as can happen with an asynchronous control. The
internal flip flop is clocked on the falling edge of the input clock, therefore
all associated specification limits are referenced to the negative edge of
the clock input.
50ps Output-to-Output Skew
Synchronous Enable/Disable
Multiplexed Clock Input
75kΩ Internal Input Pulldown Resistors
>2000V ESD Protection
VEE Range of –3.0V to –5.5V
LOGIC DIAGRAM AND PINOUT ASSIGNMENT
Q1
Q2
Q3
Q4
17
18
16
15
14
13
12
4
3
5678
9
VCC
11
10
Q4
Q3
Q2
Q1
NC
SCLK
CLK
CLK
VBB
SEL
VEE
D
Q
1
0
Q0
19
20
2
1
VCC
Q0
EN
MC100LVEL14
MC100EL14
DW SUFFIX
PLASTIC SOIC PACKAGE
CASE 751D-04
1
20
PIN
FUNCTION
CLK
Diff Clock Inputs
SCLK
Scan Clock Input
EN
Sync Enable
SEL
Clock Select Input
VBB
Reference Output
Q0–4
Diff Clock Outputs
PIN DESCRIPTION
CLK
L
H
X
X
X
SCLK
X
X
L
H
X
SEL
L
L
H
H
X
EN
L
L
L
L
H
Q
L
H
L
H
L*
FUNCTION TABLE
* On next negative transition of
CLK or SCLK


Số phần tương tự - MC100LVEL14

nhà sản xuấttên linh kiệnbảng dữ liệuGiải thích chi tiết về linh kiện
logo
ON Semiconductor
MC100LVEL14 ONSEMI-MC100LVEL14 Datasheet
127Kb / 6P
   3.3V ECL 1:5 Clock Distribution Chip
November, 2006 ??Rev. 8
MC100LVEL14 ONSEMI-MC100LVEL14 Datasheet
158Kb / 7P
   3.3 V ECL 1:5 Clock Distribution Chip
July, 2016 ??Rev. 10
MC100LVEL14DW ONSEMI-MC100LVEL14DW Datasheet
127Kb / 6P
   3.3V ECL 1:5 Clock Distribution Chip
November, 2006 ??Rev. 8
MC100LVEL14DWG ONSEMI-MC100LVEL14DWG Datasheet
127Kb / 6P
   3.3V ECL 1:5 Clock Distribution Chip
November, 2006 ??Rev. 8
MC100LVEL14DWG ONSEMI-MC100LVEL14DWG Datasheet
158Kb / 7P
   3.3 V ECL 1:5 Clock Distribution Chip
July, 2016 ??Rev. 10
More results

Mô tả tương tự - MC100LVEL14

nhà sản xuấttên linh kiệnbảng dữ liệuGiải thích chi tiết về linh kiện
logo
Semtech Corporation
SK10EL14WD SEMTECH-SK10EL14WD Datasheet
93Kb / 4P
   1:5 Clock DISTRIBUTION CHIP
logo
Pericom Semiconductor C...
PI90LV14 PERICOM-PI90LV14 Datasheet
121Kb / 6P
   1:5 Clock Distribution
logo
ON Semiconductor
MC100EL14 ONSEMI-MC100EL14_06 Datasheet
122Kb / 8P
   5V ECL 1:5 Clock Distribution Chip
October, 2006 ??Rev. 7
MC100LVEL14 ONSEMI-MC100LVEL14_06 Datasheet
127Kb / 6P
   3.3V ECL 1:5 Clock Distribution Chip
November, 2006 ??Rev. 8
MC10EL15 ONSEMI-MC10EL15_16 Datasheet
163Kb / 8P
   5V ECL 1:4 Clock Distribution Chip
July, 2016 ??Rev. 7
MC100LVEL14 ONSEMI-MC100LVEL14_16 Datasheet
158Kb / 7P
   3.3 V ECL 1:5 Clock Distribution Chip
July, 2016 ??Rev. 10
MC10EL15 ONSEMI-MC10EL15 Datasheet
88Kb / 4P
   1:4 Clock Distribution Chip
1996 REV 2
logo
Micrel Semiconductor
SY100EL14V MICREL-SY100EL14V Datasheet
67Kb / 4P
   5V/3.3V 1:5 CLOCK DISTRIBUTION
SY100EL14V MICREL-SY100EL14V_06 Datasheet
61Kb / 5P
   5V/3.3V 1:5 CLOCK DISTRIBUTION
logo
PhaseLink Corporation
PLL103-05 PLL-PLL103-05 Datasheet
122Kb / 4P
   1-to-5 Clock Distribution Buffer
More results


Html Pages

1 2 3 4


bảng dữ liệu tải về

Go To PDF Page


Link URL




Chính sách bảo mật
ALLDATASHEET.VN
Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không?  [ DONATE ] 

Alldatasheet là   |   Quảng cáo   |   Liên lạc với chúng tôi   |   Chính sách bảo mật   |   Trao đổi link   |   Tìm kiếm theo nhà sản xuất
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com