MC100EPT23

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2

1

2

3

45

6

7

8

Q0

GND

Figure 1. 8−Lead Pinout and Logic Diagram

D0

Q1

D1

D1

D0

LVPECL

LVTTL

(Top View)

Table 1. PIN DESCRIPTION

Pin

Function

Q0, Q1

LVTTL Outputs

D0**, D1**

D0**, D1**

Differential LVPECL Inputs

Positive Supply

GND

Ground

Table 2. ATTRIBUTES

Characteristics

Value

Internal Input Pulldown Resistor

50 k

W

Internal Input Pullup Resistor

50 k

W

ESD Protection

Human Body Model

Machine Model

Charged Device Model

> 1500 V

> 100 V

> 2 kV

Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)

Level 1

Flammability Rating

Oxygen Index: 28 to 34

UL 94 V−0 @ 0.125 in

Transistor Count

91 Devices

Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test

1. For additional information, see Application Note AND8003/D.

Table 3. MAXIMUM RATINGS

Symbol

Parameter

Condition 1

Condition 2

Rating

Unit

Power Supply

GND = 0 V

3.8

V

Input Voltage

GND = 0 V

3.8

V

Output Current

Continuous

Surge

50

100

mA

mA

Operating Temperature Range

−40 to +85

°C

Storage Temperature Range

−65 to +150

°C

Thermal Resistance (Junction−to−Ambient)

0 lfpm

500 lfpm

SOIC−8

SOIC−8

190

130

°C/W

°C/W

Thermal Resistance (Junction−to−Case)

Standard Board

SOIC−8

41 to 44

°C/W

Thermal Resistance (Junction−to−Ambient)

0 lfpm

500 lfpm

TSSOP−8

TSSOP−8

185

140

°C/W

°C/W

Thermal Resistance (Junction−to−Case)

Standard Board

TSSOP−8

41 to 44

°C/W

Wave Solder

< 2 to 3 sec @ 248

°C

265

°C

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit

values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,

damage may occur and reliability may be affected.