MYSON
TECHNOLOGY
MTV230M
(Rev 1.0)
Revision 1.0
- 11 -
2000/11/15
6.7 H/V SYNC Processor Register
Reg name
addr
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
HVSTUS
F40h (r)
CVpre
Hpol
Vpol
Hpre
Vpre
Hoff
Voff
HCNTH
F41h (r)
Hovf
HF13
HF12
HF11
HF10
HF9
HF8
HCNTL
F42h (r)
HF7
HF6
HF5
HF4
HF3
HF2
HF1
HF0
VCNTH
F43h (r)
Vovf
VF11
VF10
VF9
VF8
VCNTL
F44h (r)
VF7
VF6
VF5
VF4
VF3
VF2
VF1
VF0
HVCTR0
F40h (w)
C1
C0
NoHins
HBpl
VBpl
HVCTR3
F43h (w)
CLPEG
CLPPO
CLPW2
CLPW1
CLPW0
INTFLG
F48h (r/w) HPRchg VPRchg HPLchg VPLchg
HFchg
VFchg
Vsync
INTEN
F49h (w)
EHPR
EVPR
EHPL
EVPL
EHF
EVF
EVsync
HVSTUS (r) :
The status of polarity, present and static level for HSYNC and VSYNC.
CVpre = 1
→ The extracted CVSYNC is present.
= 0
→ The extracted CVSYNC is not present.
Hpol
= 1
→ HSYNC input is positive polarity.
= 0
→ HSYNC input is negative polarity.
Vpol
= 1
→ VSYNC (CVSYNC) is positive polarity.
= 0
→ VSYNC (CVSYNC) is negative polarity.
Hpre
= 1
→ HSYNC input is present.
= 0
→ HSYNC input is not present.
Vpre
= 1
→ VSYNC input is present.
= 0
→ VSYNC input is not present.
Hoff*
= 1
→ The off level HSYNC input is high.
= 0
→ The off level HSYNC input is low.
Voff*
= 1
→ The off level VSYNC input is high.
= 0
→ The off level VSYNC input is low.
*Hoff and Voff are valid when Hpre=0 or Vpre=0.
HCNTH (r) :
High bits of H-Freq counter.
Hovf
= 1
→ H-Freq counter is overflowed, this bit is cleared by H/W when condition removed.
HF13 - HF8 :
6 high bits of H-Freq counter.
HCNTL (r) :
Low byte of H-Freq counter.
VCNTH (r) :
High bits V-Freq of counter.
Vovf
= 1
→ V-Freq counter is overflowed, this bit is cleared by H/W when condition removed.
VF11 - 8 :
4 high bits of V-Freq counter.
VCNTL (r) :
Low byteV-Freq counter.
HVCTR0 (w) :
H/V SYNC processor control register 0.
C1, C0 = 1,1
→ Selects CVSYNC as the polarity, freq and VBLANK source.
= 1,0
→ Selects VSYNC as the polarity, freq and VBLANK source.
= 0,0
→ Disables composite function.
= 0,1
→ H/W auto switches to CVSYNC when CVpre=1 and VSpre=0.
NoHins = 1
→ HBLANK has no insert pulse in composite mode.
= 0
→ HBLANK has insert pulse in composite mode.
HBpl
= 1
→ Negative polarity HBLANK output.
= 0
→ Positive polarity HBLANK output.
VBpl
= 1
→ Negative polarity VBLANK output.