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8 / 12 page Philips Semiconductors Product data 74ALVCH16832 7-bit to 28-bit address register/driver with 3-state outputs 2001 Dec 14 8 From Output Under Test Load Circuit Open GND TEST S1 tpd tPLZ/tPZL Open 2 × VCC tPHZ/tPZH GND SV01849 500 Ω CL = 30 pF (see Note A) 500 Ω 2 × VCC PARAMETER MEASUREMENT INFORMATION VCC = 2.5 V ± 0.2 V Timing Input VCC/2 VCC 0 V VCC 0 V VCC/2 VCC/2 tsu th Voltage Waveforms Setup and Hold Times VCC 0 V VCC/2 VCC/2 tw Data Input Input Voltage Waveforms Pulse Duration VCC 0 V Input VCC/2 VCC/2 tPLH VOH VOL VCC/2 VCC/2 tPHL Output Voltage Waveforms Propagation Delay Times VCC 0 V Output Control (low-level enabling) VCC/2 VCC/2 VCC VOL VOL + 0.15 V tPZL tPLZ VCC/2 VOH 0 V VOH – 0.15 V VCC/2 tPZH tPHZ Voltage Waveforms Enable and Disable Times Output Waveform 1 S1 at 2 x VCC (see Note B) Output Waveform 2 S1 at GND (see Note B) S1 Figure 2. Load circuit and voltage waveforms NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2 ns, tf ≤ 2 ns. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. |
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