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TS5A23159DGSR bảng dữ liệu(PDF) 3 Page - Texas Instruments |
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TS5A23159DGSR bảng dữ liệu(HTML) 3 Page - Texas Instruments |
3 / 23 page www.ti.com Electrical Characteristics for 5-V Supply (1) TS5A23159 1- Ω DUAL SPDT ANALOG SWITCH 5-V/3.3-V 2-CHANNEL 2:1 MULTIPLEXER/DEMULTIPLEXER SCDS201 – AUGUST 2005 V + = 4.5 V to 5.5 V, TA = –40°C to 85°C (unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS TA V+ MIN TYP MAX UNIT Analog Switch Analog signal VCOM, VNO, 0 V+ V range VNC 0 ≤ (V NO or VNC) ≤ V+, Switch ON, 25 °C 0.8 1.1 Peak ON rpeak 4.5 V Ω ICOM = –100 mA, See Figure 13 resistance Full 1.5 VNO or VNC = 2.5 V, 25 °C 0.7 0.9 ON-state Switch ON, ron 4.5 V Ω ICOM = –100 mA, resistance See Figure 13 Full 1.1 ON-state 25 °C 0.05 0.1 resistance VNO or VNC = 2.5 V, Switch ON, match ∆r on 4.5 V Ω ICOM = –100 mA, See Figure 13 Full 0.1 between channels 0 ≤ (V NO or VNC) ≤ V+, Switch ON, 25 °C 0.15 ICOM = –100 mA, See Figure 13 ON-state resistance ron(flat) 4.5 V Ω VNO or VNC = 1 V, 25 °C 0.1 0.25 Switch ON, flatness 1.5 V, 2.5 V, See Figure 13 Full 0.25 ICOM = –100 mA, VNC or VNO = 1 V, 25 °C –20 2 20 VCOM = 1 V to 4.5 V, INO(OFF), Switch OFF, or 5.5 V nA NC, NO INC(OFF) See Figure 14 Full –100 100 VNC or VNO = 4.5 V, OFF leakage VCOM = 1 V to 4.5 V, current 25 °C –1 0.2 1 INC(PWROFF), VNC or VNO = 0 to 5.5 V, Switch OFF, 0 V µA INO(PWROFF) VCOM = 5.5 V to 0, See Figure 14 Full –20 20 VNC or VNO= 1 V, 25 °C –20 2 20 NC, NO VCOM = Open, INO(ON), Switch ON, ON leakage or 5.5 V nA INC(ON) See Figure 15 Full –20 20 current VNC or VNO= 4.5 V, VCOM = Open, COM 25 °C –1 0.1 1 VNC or VNO = 0 to 5.5 V, Switch ON, OFF leakage ICOM(PWROFF) 0 V µA VCOM = 5.5 V to 0, See Figure 14 Full –20 20 current VNC or VNO = Open, 25 °C –20 2 20 COM VCOM = 1 V, Switch ON, ON leakage ICOM(ON) or 5.5 V nA See Figure 15 Full –100 100 current VNC or VNO = Open, VCOM = 4.5 V, Digital Control Inputs (IN1, IN2)(2) Input logic high VIH Full 2.4 5.5 V Input logic low VIL Full 0 0.8 V 25 °C –2 TBD 2 Input leakage IIH, IIL VI = 5.5 V or 0 5.5 V µA current Full 100 100 (1) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum (2) All unused digital inputs of the device must be held at V+ or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 3 |
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