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ADS5221PFBT bảng dữ liệu(PDF) 2 Page - Texas Instruments

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Giải thích chi tiết về linh kiện  12-Bit, 65MSPS Sampling, 3.3V ANALOG-TO-DIGITAL CONVERTER
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Trang chủ  http://www.ti.com
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ADS5221PFBT bảng dữ liệu(HTML) 2 Page - Texas Instruments

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ADS5221
2
SBAS262A
www.ti.com
ADS5221
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
RESOLUTION
12 Tested
Bits
SPECIFIED TEMPERATURE RANGE
Ambient Air
–40 to +85
°C
ANALOG INPUT
Single-Ended Input Range
2VPP
0.5
2.5
V
Optional Single-Ended Input Range
1VPP
12
V
Differential Input Range
2VPP
12
V
Analog Input Bias Current
1
µA
Input Impedance
Static, No Clock
1.25 || 5
M
Ω || pF
Analog Input Bandwidth
–3dBFS Input
300
MHz
CONVERSION CHARACTERISTICS
Sample Rate
1M
65M
Samples/s
Data Latency
5
Clock Cycle
DYNAMIC CHARACTERISTICS
Differential Linearity Error (largest code error)
f = 2.4MHz
±0.3
±0.75
LSB
f = 9.7MHz
±0.5
LSB
No Missing Codes
Tested
Integral Nonlinearity Error, f = 2.4MHz
±0.5
±1.75
LSBs
Spurious-Free Dynamic Range(1)
Referred to Full-Scale
f = 2.4MHz
90
dBFS(2)
f = 9.7MHz
at 25
°C
78
88
dBFS
f = 32.5MHz
85
dBFS
2-Tone Intermodulation Distortion(3)
f = 9.5MHz and 10.5MHz (–7dB each tone)
92
dBFS
Signal-to-Noise Ratio (SNR)
Referred to Full-Scale
f = 2.4MHz
70
dB
f = 9.7MHz
at 25
°C68
70
dB
f = 32.5MHz
69
dB
Signal-to-(Noise + Distortion) (SINAD)
Referred to Full-Scale
f = 2.4MHz
70
dB
f = 9.7MHz
at 25
°C67
70
dB
f = 32.5MHz
68
dB
Effective Number of Bits(4), f = 2.4MHz
11.2
Bits
Output Noise
Input Tied to Common-Mode
0.2
LSBs rms
Aperture Delay Time
3.0
ns
Aperture Jitter
1.2
ps rms
Over-Voltage Recovery Time
1.0
Clock Cycle
Full-Scale Step Acquisition Time
5ns
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instru-
ments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
AVDD, DVDD, VDRV .......................................................................... +3.8V
Analog Input ........................................................... –0.3V to (AVDD + 0.3V)
Logic Input ............................................................. –0.3V to (AVDD + 0.3V)
Case Temperature ......................................................................... +100
°C
Junction Temperature .................................................................... +150
°C
Storage Temperature ..................................................................... +150
°C
NOTE: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability.
ABSOLUTE MAXIMUM RATINGS(1)
SPECIFIED
PACKAGE
TEMPERATURE
PACKAGE
ORDERING
TRANSPORT
PRODUCT
PACKAGE-LEAD
DESIGNATOR
RANGE
MARKING
NUMBER
MEDIA, QUANTITY
ADS5221
TQFP-48
PFB
–40
°C to +85°C
ADS5221PFB
ADS5221PFBT
Tape and Reel, 250
"
"
"
"
"
ADS5221PFBR
Tape and Reel, 2000
ADS5221
QFN-48(2)
RGZ
–40
°C to +85°C
ADS5221RGZ
ADS5221RGZ
Rails, 52
"
"
"
"
"
ADS5221RGZR
Tape and Reel, 1000
NOTE: (1) For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet.
(2) This package available beginning Q1 2004.
PACKAGE/ORDERING INFORMATION(1)
ELECTRICAL CHARACTERISTICS: AVDD = 3.3V
TMIN = –40°C, TMAX = +85°C, typical values are at TA = +25°C, sampling rate = 65MSPS, 50% clock duty cycle, AVDD = 3.3V, VDRV = 2.5V, –1dBFS, internal reference
voltage, and 2VPP differential input, unless otherwise noted.


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