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MCF5272 bảng dữ liệu(PDF) 11 Page - Motorola, Inc

tên linh kiện MCF5272
Giải thích chi tiết về linh kiện  MCF5272 ColdFire Integrated Microprocessor Users Manual
Download  550 Pages
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nhà sản xuất  MOTOROLA [Motorola, Inc]
Trang chủ  http://www.freescale.com
Logo MOTOROLA - Motorola, Inc

MCF5272 bảng dữ liệu(HTML) 11 Page - Motorola, Inc

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CONTENTS
Paragraph
Number
Title
Page
Number
MOTOROLA
Contents
xi
11.4.8.1
Transmission Errors................................................................................ 11-10
11.4.8.2
Reception Errors ..................................................................................... 11-10
11.5
Programming Model ....................................................................................... 11-11
11.5.1
Ethernet Control Register (ECR) ................................................................ 11-12
11.5.2
Interrupt Event Register (EIR).................................................................... 11-12
11.5.3
Interrupt Mask Register (EIMR)................................................................. 11-13
11.5.4
Interrupt Vector Status Register (IVSR)..................................................... 11-14
11.5.5
Receive Descriptor Active Register (RDAR) ............................................. 11-15
11.5.6
Transmit Descriptor Active Register (TDAR)............................................ 11-16
11.5.7
MII Management Frame Register (MMFR) ............................................... 11-17
11.5.8
MII Speed Control Register (MSCR) ......................................................... 11-18
11.5.9
FIFO Receive Bound Register (FRBR) ...................................................... 11-19
11.5.10
FIFO Receive Start Register (FRSR).......................................................... 11-20
11.5.11
Transmit FIFO Watermark (TFWR)........................................................... 11-21
11.5.12
FIFO Transmit Start Register (TFSR) ........................................................ 11-22
11.5.13
Receive Control Register (RCR) ................................................................ 11-22
11.5.14
Maximum Frame Length Register (MFLR) ............................................... 11-23
11.5.15
Transmit Control Register (TCR) ............................................................... 11-24
11.5.16
RAM Perfect Match Address Low (MALR) .............................................. 11-25
11.5.16.1
RAM Perfect Match Address High (MAUR) ......................................... 11-26
11.5.17
Hash Table High (HTUR)........................................................................... 11-27
11.5.18
Hash Table Low (HTLR)............................................................................ 11-27
11.5.19
Pointer-to-Receive Descriptor Ring (ERDSR) ........................................... 11-28
11.5.20
Pointer-to-Transmit Descriptor Ring (ETDSR).......................................... 11-28
11.5.21
Receive Buffer Size Register (EMRBR) .................................................... 11-29
11.5.22
Initialization Sequence................................................................................ 11-30
11.5.22.1
Hardware Initialization ........................................................................... 11-30
11.5.23
User Initialization (Prior to Asserting ETHER_EN) .................................. 11-30
11.5.24
FEC Initialization........................................................................................ 11-31
11.5.24.1
User Initialization (after setting ETHER_EN) ....................................... 11-31
11.6
Buffer Descriptors........................................................................................... 11-32
11.6.1
FEC Buffer Descriptor Tables .................................................................... 11-32
11.6.1.1
Ethernet Receive Buffer Descriptor (RxBD).......................................... 11-33
11.6.1.2
Ethernet Transmit Buffer Descriptor ...................................................... 11-34
11.7
Differences between MCF5272 FEC and MPC860T FEC............................. 11-36
Chapter 12
Universal Serial Bus (USB)
12.1
Introduction....................................................................................................... 12-1
12.2
Module Operation ............................................................................................. 12-3
12.2.1
USB Module Architecture ............................................................................ 12-3
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