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MC34701EK bảng dữ liệu(PDF) 3 Page - Freescale Semiconductor, Inc

tên linh kiện MC34701EK
Giải thích chi tiết về linh kiện  1.5 A Switch-Mode Power Supply with Linear Regulator
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MC34701EK bảng dữ liệu(HTML) 3 Page - Freescale Semiconductor, Inc

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Analog Integrated Circuit Device Data
Freescale Semiconductor
3
34701
TERMINAL CONNECTIONS
TERMINAL CONNECTIONS
Figure 3. Terminal Connections
Table 1.
Terminal Function Description
A functional description of each terminal can be found in the FUNCTIONAL TERMINAL DESCRIPTION section beginning
on page 15.
Terminal
Terminal
Name
Formal Name
Definition
1
FREQ
Oscillator Frequency
This switcher frequency selection terminal can be adjusted by connecting external
resistor RF to the FREQ terminal. The default switching frequency (FREQ terminal
left open or tied to VDDI) is set to 300 kHz.
2
INV
Inverting Input
Buck Controller Error Amplifier inverting input.
3
VOUT
Output Voltage
Output voltage of the buck converter. Input terminal of the switching regulator power
sequence control circuit.
4, 5
VIN2
Input Voltage 2
Buck regulator power input. Drain of the high-side power MOSFET.
6, 7
SW
Switch
Buck regulator switching node. This terminal is connected to the inductor.
8, 9
24, 25
GND
Ground
Analog ground of the IC, thermal heatsinking.
10, 11
PGND
Power Ground
Buck regulator power ground.
12
VBD
Boost Drain
Drain of the internal boost regulator power MOSFET.
13
VBST
Boost Voltage
Internal boost regulator output voltage. The internal boost regulator provides a
20 mA output current to supply the drive circuits for the integrated power MOSFETs
and the external N-channel power MOSFET of the linear regulator. The voltage at
the VBST terminal is 7.75V nominal.
14
BOOT
Bootstrap
Bootstrap capacitor input.
15
SDA
Serial Data
I2C bus terminal. Serial data.
16
SCL
Serial Clock
I2C bus terminal. Serial clock.
17
LCMP
Linear Compensation
Linear regulator compensation terminal.
18
LFB
Linear Feedback
Linear regulator feedback terminal.
19
LDO
Linear Regulator
Input terminal of the linear regulator power sequence control circuit.
CLKSYN
1
EN2
EN1
ADDR
GND
GND
V
DD1
V
IN1
LDRV
CS
LFB
LCMP
LDO
RT
CLKSEL
RST
FREQ
V
IN2
SW
SW
GND
GND
PGND
PGND
VBD
VBST
SDA
SCL
BOOT
V
IN2
INV
V
OUT
8
9
10
11
12
13
14
15
16
3
4
5
6
7
2
32
25
24
23
22
21
20
19
18
17
30
29
28
27
26
31


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