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MC68HC705V12 bảng dữ liệu(PDF) 8 Page - Motorola, Inc

tên linh kiện MC68HC705V12
Giải thích chi tiết về linh kiện  The Motorola microcontroller
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nhà sản xuất  MOTOROLA [Motorola, Inc]
Trang chủ  http://www.freescale.com
Logo MOTOROLA - Motorola, Inc

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Table of Contents
Advance Information
MC68HC705V12 Rev. 3.0
8
Table of Contents
MOTOROLA
5.4.5
Low-Voltage Reset (LVR) . . . . . . . . . . . . . . . . . . . . . . . . . .73
5.4.6
LVR Operation in Stop and Wait Modes . . . . . . . . . . . . . . .74
Section 6. Low-Power Modes
6.1
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .75
6.2
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .75
6.3
STOP Instruction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .75
6.4
Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .76
6.5
WAIT Instruction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .79
6.6
Data-Retention Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .79
Section 7. Parallel Input/Output (I/O)
7.1
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .81
7.2
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .81
7.3
Port A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .82
7.3.1
Port A Data Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .82
7.3.2
Port A Data Direction Register . . . . . . . . . . . . . . . . . . . . . .82
7.4
Port B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .83
7.4.1
Port B Data Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .83
7.4.2
Port B Data Direction Register . . . . . . . . . . . . . . . . . . . . . .84
7.5
Port C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .84
7.5.1
Port C Data Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .84
7.5.2
Port C Data Direction Register . . . . . . . . . . . . . . . . . . . . . .85
7.5.3
Port C I/O Pin Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . .85
7.6
Port D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .86
Section 8. Core Timer
8.1
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .87
8.2
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .87
8.3
Core Timer Status and Control Register. . . . . . . . . . . . . . . . . .89
8.4
Computer Operating Properly (COP) Reset . . . . . . . . . . . . . . .91


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