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MC68HC705V12 bảng dữ liệu(PDF) 7 Page - Motorola, Inc

tên linh kiện MC68HC705V12
Giải thích chi tiết về linh kiện  The Motorola microcontroller
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nhà sản xuất  MOTOROLA [Motorola, Inc]
Trang chủ  http://www.freescale.com
Logo MOTOROLA - Motorola, Inc

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Table of Contents
MC68HC705V12 Rev. 3.0
Advance Information
MOTOROLA
Table of Contents
7
Section 4. Interrupts
4.1
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55
4.2
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .56
4.3
CPU Interrupt Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . .56
4.4
Reset Interrupt Sequence. . . . . . . . . . . . . . . . . . . . . . . . . . . . .59
4.5
Software Interrupt (SWI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59
4.6
Hardware Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59
4.7
External Interrupt (IRQ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59
4.7.1
IRQ Status and Control Register. . . . . . . . . . . . . . . . . . . . .62
4.7.2
External Interrupt Timing . . . . . . . . . . . . . . . . . . . . . . . . . . .64
4.8
16-Bit Timer Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65
4.9
BDLC Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65
4.10
SPI Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65
4.11
8-Bit Timer Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65
4.12
Gauge Synchronize Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . .66
4.13
Stop Mode and Wait Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . .66
Section 5. Resets
5.1
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .67
5.2
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .67
5.3
External Reset (RESET). . . . . . . . . . . . . . . . . . . . . . . . . . . . . .68
5.4
Internal Resets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .69
5.4.1
Power-On Reset (POR). . . . . . . . . . . . . . . . . . . . . . . . . . . .69
5.4.2
Computer Operating Properly Reset (COPR) . . . . . . . . . . .71
5.4.2.1
Resetting the COP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .71
5.4.2.2
COP during Wait Mode . . . . . . . . . . . . . . . . . . . . . . . . . .71
5.4.2.3
COP during Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . .71
5.4.2.4
COP Watchdog Timer Considerations . . . . . . . . . . . . . . .72
5.4.2.5
COP Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .73
5.4.3
Illegal Address Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . .73
5.4.4
Disabled STOP Instruction Reset . . . . . . . . . . . . . . . . . . . .73


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