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AD5231 bảng dữ liệu(PDF) 11 Page - Analog Devices

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AD5231
–11–
During operation, the scratch pad (wiper) register can also be
refreshed with the current content of the nonvolatile EEMEM
register under hardware control by pulsing the
PR Pin without
activating instruction 1 or 8. Beware that the
PR pulse first sets
the wiper at midscale when brought to logic zero, and then on
the positive transition to logic high, it reloads the RDAC wiper
register with the contents of EEMEM. Many additional advanced
programming commands are available to simplify the variable
resistor adjustment process, See Table III. For example, the
wiper position can be changed one step at a time by using the
Increment/Decrement instruction or by 6 dB at a time with the
Shift Left/Right instruction command. Once an Increment, Decre-
ment, or Shift command has been loaded into the shift register,
subsequent
CS strobes will repeat this command. This is useful
for push button control applications. See the advanced control
modes section following the Instruction Operation Truth Table. A
serial data output SDO Pin is available for daisy-chaining and
for readout of the internal register contents. The serial input
data register uses a 24-bit [instruction/address/data] WORD format.
EEMEM Protection
Write protect (
WP) disables any changes of the scratch pad
register contents regardless of the software commands, except
that the EEMEM setting can be refreshed and overwritten
WP
by using commands 1, 8, and
PR pulse. Therefore, the write-
protect (
WP) Pin provides a hardware EEMEM protection
feature. To disable
WP, it is recommended to execute a NOP
command before returning
WP to logic high.
Digital Input/Output Configuration
All digital inputs are ESD-protected high-input impedance that
can be driven directly from most digital sources. Active at logic
low,
PR and WP must be biased to V
DD if they are not used. No
internal pull-up resistors are present on any digital input pins.
The SDO and RDY Pins are open-drain digital outputs where
pull-up resistors are needed only if using these functions. A
resistor value in the range of 1 k
Ω to 10 kΩ is a proper choice
which balances the power and switching speed trade off.
The equivalent serial data input and output logic is shown in
Figure 3. The open drain output SDO is disabled whenever chip
select
CS is logic high. ESD protection of the digital inputs is
shown in Figures 4a and 4b.
VALID
COMMAND
COUNTER
COMMAND
PROCESSOR
AND ADDRESS
DECODE
SERIAL
REGISTER
CLK
SDI
5V
RPULLUP
SDO
GND
PR
WP
CS
AD5231
Figure 3. Equivalent Digital Input-Output Logic
LOGIC
PINS
VDD
GND
INPUT
300
Figure 4a. Equivalent ESD Digital Input Protection
VDD
GND
INPUT
300
WP
Figure 4b. Equivalent
WP Input Protection
Serial Data Interface
The AD5231 contains a four-wire SPI compatible digital inter-
face (SDI, SDO,
CS, and CLK). The AD5231 uses a 24-bit
serial data word loaded MSB first. The format of the SPI com-
patible word is shown in Table II. The chip select
CS Pin needs
to be held low until the complete data word is loaded into the
SDI Pin. When
CS returns high the serial data word is decoded
according to the instructions in Table III. The Command Bits
(Cx) control the operation of the digital potentiometer. The
Address Bits (Ax) determine which register is activated. The
Data Bits (Dx) are the values that are loaded into the decoded
register. Table V provides an address map of the EEMEM
locations. The last instruction executed prior to a period of no
programming activity should be the No Operation (NOP) instruc-
tion. This will place the internal logic circuitry in a minimum power
dissipation state.
The SPI interface can be used in two slave modes CPHA = 1,
CPOL = 1 and CPHA = 0, CPOL = 0. CPHA and CPOL refer to
the control bits, that dictate SPI timing in these MicroConverters
®
and microprocessors: ADuC812/ADuC824, M68HC11, and
MC68HC16R1/916R1.
Daisy-Chain Operation
The Serial Data Output Pin (SDO) serves two purposes. It can
be used to readout the contents of the wiper setting and EEMEM
values using instructions 10 and 9, respectively. The remaining
instructions (#0–#8, #11–#15) are valid for daisy-chaining
multiple devices in simultaneous operations. Daisy-chaining
minimizes the number of port pins required from the controlling IC
(see Figure 5). The SDO Pin contains an open drain N-Ch FET
that requires a pull-up resistor, if this function is used. As shown
in Figure 5, users need to tie the SDO Pin of one package to the
MicroConverter is a registered trademark of Analog Devices Inc.


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