SN74SSTVF16857

14BIT REGISTERED BUFFER

WITH SSTL_2 INPUTS AND OUTPUTS

SCES411B – AUGUST 2002 – REVISED APRIL 2003

6

POST OFFICE BOX 655303

PARAMETER MEASUREMENT INFORMATION

VCC/2

VOLTAGE AND CURRENT WAVEFORMS

INPUTS ACTIVE AND INACTIVE TIMES

NOTES: A. CL includes probe and jig capacitance.

B. ICC tested with clock and data inputs held at VCC or GND, and IO = 0 mA.

C. All input pulses are supplied by generators having the following characteristics: PRR

≤ 10 MHz, ZO = 50 Ω,

input slew rate = 1 V/ns

±20% (unless otherwise noted).

D. The outputs are measured one at a time with one transition per measurement.

E. VREF = VDDQ/2

F. VIH = VREF + 310 mV (ac voltage levels) for differential inputs. VIH = VCC for LVCMOS input.

G. VIL = VREF – 310 mV (ac voltage levels) for differential inputs. VIL = GND for LVCMOS input.

H. tPLH and tPHL are the same as tpd.

0 V

VCC

VOLTAGE WAVEFORMS

SETUP AND HOLD TIMES

Timing

Inputs

VICR

VREF

Input

VIL

VIH

VREF

VI(PP)

tPHL

VOH

VOL

Output

VDDQ/2

VDDQ/2

tPLH

tPHL

VIH

VIL

VOL

VOH

LVCMOS

RESET

Input

Output

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

VDDQ/2

VCC/2

VI(PP)

VICR

Timing

Inputs

VICR

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

VCC/2

VREF

Input

VREF

tw

VOLTAGE WAVEFORMS

PULSE DURATION

VIH

VIL

LVCMOS

RESET

Input

tact

tinact

10%

90%

ICC (operating)

ICC (standby)

ICC

(see

Note B)

tsu

th

LOAD CIRCUIT

CL = 30 pF

(see Note A)

Test

Point

From Output

Under Test

RL = 500 Ω

Figure 1. Load Circuit and Voltage Waveforms