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NBSG72AMN bảng dữ liệu(PDF) 8 Page - ON Semiconductor

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Giải thích chi tiết về linh kiện  2.5V/3.3V SiGe Differential 2 X 2 Crosspoint Switch with Output Level Select
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nhà sản xuất  ONSEMI [ON Semiconductor]
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Table 10. AC CHARACTERISTICS VCC = 0 V; VEE = −3.465 V to −2.375 V or VCC = 2.375 V to 3.465 V; VEE = 0 V (Note 18)
−40
°C
25
°C
85
°C
Symbol
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
VOUTPP
Output Voltage Amplitude
fin < 5 GHz
(Note 18)
fin v 7 GHz
400
200
590
250
450
180
590
250
440
130
590
250
mV
tPLH
Propagation Delay to Output Differential
D0, D1
→ Q0, Q1
SELA, SELB
→ Q0, Q1
170
190
205
265
255
350
170
190
205
265
255
350
170
190
210
265
260
350
ps
tPHL
Propagation Delay to Output Differential
D0, D1
→ Q0, Q1
SELA, SELB
→ Q0, Q1
170
150
205
215
255
270
170
150
205
215
255
270
170
150
210
215
260
270
ps
tSKEW
Duty Cycle Skew (Note 19)
Within−Device Skew
Device−to−Device Skew
5.0
5.0
15
25
25
50
5.0
5.0
15
25
25
50
5.0
5.0
15
25
25
50
ps
tJITTER
RMS Random Clock Jitter (Note 20)
fin v7 GHz
Peak−to−Peak Data Dependent Jitter
(Note 21)
fin v7 Gb/s
0.2
12
1.5
18
0.2
12
1.5
18
0.2
12
1.5
18
ps
VINPP
Input Voltage Swing/Sensitivity
(Differential Configuration) (Note 22)
75
2600
75
2600
75
2600
mV
tr
tf
Output Rise/Fall Times
(Q0, Q1)
(20% − 80%)
tr
@ 1 GHz
tf
40
30
55
45
70
55
40
30
55
45
70
55
40
30
55
45
70
55
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
18. Measured using a 75 mV source, 50% duty cycle clock source. All loading with 50
W to VCC − 2.0 V. OLS = FLOAT. Input edge rates 40 ps
(20% − 80%).
19. tSKEW = |tPLH − tPHL| for a nominal 50% differential clock input waveform.
20. Additive RMS jitter with 50% Duty Cycle clock signal at 7 GHz.
21. Additive Peak−to−Peak data dependent jitter with NRZ PRBS 231−1 data at 7 Gb/s.
22. Input Voltage Swing is a single−ended measurement operating in differential mode. VINPP (max) cannot exceed VCC − VEE.
0
100
200
300
400
500
600
700
800
900
1
234
5678
9
INPUT FREQUENCY (GHz)
Figure 3. Output Voltage Amplitude (VOUTPP) vs.
Input Clock Frequency (fin) @ Ambient Temperature (Typical)
OLS = VCC
OLS = VCC − 0.8 V = FLOAT
*OLS = VEE
OLS = VCC − 0.4 V
*When an output level of 400 mV is desired and VCC − VEE > 3.0 V, a 2 kW resistor should be connected from OLS to VEE.


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