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MC10H164FN bảng dữ liệu(PDF) 1 Page - ON Semiconductor |
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1 / 8 page © Semiconductor Components Industries, LLC, 2000 March, 2000 – Rev. 7 1 Publication Order Number: MC10H164/D MC10H164 8-Line Multiplexer The MC10H164 is a MECL 10H part which is a functional/pinout duplication of the standard MECL 10K family part, with 100% improvement in propagation delay, and no increase in power supply current. The MC10H164 is designed to be used in data multiplexing and parallel to serial conversion applications. Full parallel gating provides equal delays through any data path. The MC10H164 incorporates an output buffer, eight inputs and an enable. A high on the enable forces the output low. The open emitter output allows the MC10H164 to be connected directly to a data bus. The enable line allows an easy means of expanding to more than 8 lines using additional MC10H164’s. • Propagation Delay, 1.0 ns Typical • Power Dissipation, 310 mW Typical (same as MECL 10K) • Improved Noise Margin 150 mV (Over Operating Voltage and Temperature Range) • Voltage Compensated • MECL 10K–Compatible LOGIC DIAGRAM VCC1 = PIN 1 VCC2 = PIN 16 VEE = PIN 8 A 7 B 9 C 10 Enable 2 X0 6 X1 5 X2 4 X3 3 X4 11 X5 12 X6 13 X7 14 Z 15 DIP PIN ASSIGNMENT VCC1 ENABLE X3 X2 X1 X0 A VEE VCC2 Z X7 X6 X5 X4 C B 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 Pin assignment is for Dual–in–Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 18 of the ON Semiconductor MECL Data Book (DL122/D). http://onsemi.com Device Package Shipping ORDERING INFORMATION MC10H164L CDIP–16 25 Units/Rail MC10H164P PDIP–16 25 Units/Rail MC10H164FN PLCC–20 46 Units/Rail MARKING DIAGRAMS 1 16 A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week CDIP–16 L SUFFIX CASE 620 MC10H164L AWLYYWW PDIP–16 P SUFFIX CASE 648 PLCC–20 FN SUFFIX CASE 775 10H164 AWLYYWW 1 1 16 MC10H164P AWLYYWW TRUTH TABLE ADDRESS INPUTS ENABLE CB A Z L L L L L L L L L L H H L H L H X0 X1 X2 X3 H XL XX L L L L H H H H L L H H L H L H X4 X5 X6 X7 |
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