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ST2202 bảng dữ liệu(PDF) 7 Page - List of Unclassifed Manufacturers |
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ST2202 bảng dữ liệu(HTML) 7 Page - List of Unclassifed Manufacturers |
7 / 65 page Sitronix ST2202 Ver 2.0a 7/65 2003-May-05 6 6.. C CP PU U Register Model 7 0 A 7 0 Y 7 0 X 7 0 PCH PCL 7 0 1 S Accumulator A Index Register Y Index Register X Program Counter PC Stack Pointer S Accumulator (A) The Accumulator is a general-purpose 8-bit register that stores the results of most arithmetic and logic operations. In addition, the accumulator usually contains one of the two data words used in these operations. Index Registers (X,Y) There are two 8-bit Index Registers (X and Y), which may be used to count program steps or to provide and index value to be used in generating an effective address. When executing an instruction, which specifies indexed addressing, the CPU fetches the OP code and the base address, and modifies the address by adding the index register to it prior to performing the desired operation. Pre or post-indexing of indirect addresses is possible. Stack Pointer (S) The Stack Pointer is an 8-bit register, which is used to control the addressing of the variable-length stack. It’s range from 100H to 1FFH total for 256 bytes (128 level deep). The stack pointer is automatically increment and decrement under control of the microprocessor to perform stack manipulations under direction of either the program or interrupts (IRQ). The stack allows simple implementation of nested subroutines and multiple level interrupts. The stack pointer is initialized by the user’s software. Program Counter (PC) The 16-bit Program Counter register provides the address, which step the microprocessor through sequential program instructions. Each time the microprocessor fetches and instruction from program memory, the lower byte of the program counter (PCL) is placed on the low-order bits of the address bus and the higher byte of the program counter (PCH) is placed on the high-order 8 bits. The counter is increment each time an instruction or data is fetched from program memory. Status Register (P) The 8-bit Processor Status Register contains seven status flags. Some of these flags are controlled by program; others may be also controlled by the CPU as well. The instruction set contains a member of conditional branch instructions that are designed to allow testing of these flags. Refer to TABLE 6-1 TABLE 6-1 Status Register (P) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 N V 1 B D I Z C Bit 7: N : Signed flag by arithmetic 1 = Negative 0 = Positive Bit 3: D : Decimal mode flag 1 = Decimal mode 0 = Binary mode Bit 6: V : Overflow of signed Arithmetic flag 1 = Negative 0 = Positive Bit 2: I : Interrupt disable flag 1 = Interrupt disable 0 = Interrupt enable Bit 1: Z : Zero flag 1 = Zero 0 = Non zero Bit 4: B : BRK interrupt flag 1 = BRK interrupt occur 0 = Non BRK interrupt occur Bit 0: C : Carry flag 1 = Carry 0 = Non carry |
Số phần tương tự - ST2202 |
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Mô tả tương tự - ST2202 |
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