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1 / 28 page Dual 12-Bit, High Bandwidth, Multiplying DAC with 4-Quadrant Resistors and Serial Interface AD5415 Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved. FEATURES On-chip 4-quadrant resistors allow flexible output ranges 10 MHz multiplying bandwidth 50 MHz serial interface 2.5 V to 5.5 V supply operation ±10 V reference input Extended temperature range: −40°C to +125°C 24-lead TSSOP package Guaranteed monotonic Power-on reset Daisy-chain mode Readback function 0.5 µA typical current consumption APPLICATIONS Portable battery-powered applications Waveform generators Analog processing Instrumentation applications Programmable amplifiers and attenuators Digitally controlled calibration Programmable filters and oscillators Composite video Ultrasound Gain, offset, and voltage trimming GENERAL DESCRIPTION The AD54151 is a CMOS 12-bit, dual-channel, current output digital-to-analog converter. This device operates from a 2.5 V to 5.5 V power supply, making it suited to battery-powered appli- cations as well as many other applications. The applied external reference input voltage (VREF) determines the full-scale output current. An integrated feedback resistor (RFB) provides temperature tracking and full-scale voltage output when combined with an external current-to-voltage precision amplifier. In addition, this device contains all the 4-quadrant resistors necessary for bipolar operation and other configuration modes. This DAC utilizes a double-buffered 3-wire serial interface that is compatible with SPI®, QSPI™, MICROWIRE™, and most DSP interface standards. In addition, a serial data out pin (SDO) allows for daisy-chaining when multiple packages are used. Data readback allows the user to read the contents of the DAC register via the SDO pin. On power-up, the internal shift register and latches are filled with zeros, and the DAC outputs are at zero scale. As a result of manufacture on a CMOS submi- cron process, this part offers excellent 4-quadrant multiplication characteristics, with large-signal multiplying bandwidths of 10 MHz. 1US Patent Number 5,689,257. FUNCTIONAL BLOCK DIAGRAM POWER-ON RESET INPUT REGISTER DAC REGISTER 12-BIT R-2R DAC B INPUT REGISTER DAC REGISTER 12-BIT R-2R DAC A SHIFT REGISTER VDD SCLK SDIN GND SDO SYNC LDAC R3 2R R2 2R R1 2R RFB 2R R1 2R RFB 2R R3 2R R2 2R AD5415 R3A R2_3A R2A VREFA R1A R3B R2_3B R2B VREFB R1B RFBA IOUT1A IOUT2A IOUT1B IOUT2B RFBB CLR Figure 1. |
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