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ST68C554 bảng dữ liệu(PDF) 7 Page - Exar Corporation

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ST16C554/554D/68C554
7
Rev. 3.10
SYMBOL DESCRIPTION
Symbol
Pin
Signal
Pin Description
68
64
type
pin a logic 1. Making this pin a logic 0 allows MCR bit-3 to
control the three state interrupt output. In this mode, MCR
bit-3 is set to a logic “1” to enable the three state outputs.
This pin is disabled in the 68 mode. Due to pin limitations on
64 pin packages, this pin is not available. To cover this
limitation, two 64 pin QFP package versions are offered.
The ST16C554DCQ64 operates in the continuos interrupt
enable mode by bonded this pin to VCC internally. The
ST16C554CQ64 operates with MCR bit-3 control by bond-
ing this pin to GND.
-IOR
52
40
I
Read strobe. (active low Strobe) - This function is associ-
ated with the 16 mode only. A logic 0 transition on this pin
will load the contents of an Internal register defined by
address bits A0-A2 onto the ST16C554D data bus (D0-D7)
for access by an external CPU. This pin is disabled in the 68
mode.
-IOW
18
9
I
Write strobe. (active low strobe) - This function is associ-
ated with the 16 mode only. A logic 0 transition on this pin
will transfer the contents of the data bus (D0-D7) from the
external CPU to an internal register that is defined by
address bits A0/A2. When the 16 mode is selected, this pin
functions as -R/W, see definition under R/W.
-IRQ
15
-
O
Interrupt Request or Interrupt “A” - This function is associ-
ated with the 68 mode only. In the 68 mode, interrupts from
UART channels A-D are WIRE-OR’ed” internally to function
as a single IRQ interrupt. This pin transitions to a logic 0 (if
enabled by the interrupt enable register) whenever a UART
channel(s) requires service. Individual channel interrupt
status can be determined by addressing each channel
through its associated internal register, using -CS and A3-
A4. In the 68 mode an external pull-up resistor must be
connected between this pin and VCC. The function of this
pin changes to INTA when operating in the 16 mode, see
definition under INTA.


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