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STA1088 bảng dữ liệu(PDF) 4 Page - STMicroelectronics |
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STA1088 bảng dữ liệu(HTML) 4 Page - STMicroelectronics |
4 / 16 page System description STA1074, STA1078, STA1079, STA1088 4/16 DocID028356 Rev 1 2 System description 2.1 Processor MCU Telemaco2 family devices processing capability relies on an ARM Cortex-R4. The MCU has instruction cache and data cache, as well as TCM Memory dedicated respectively to instructions and data for high throughput and low latency tasks. 2.2 Memory controller 2.2.1 Embedded memory Telemaco2 family devices embed SRAM memory, which can be used for data or code storage. Embedded memory can be used in conjunction with executable in place serial NOR devices to implement cost effective solutions. The whole embedded memory is also cacheable and can be accessed by DMA. 2.2.2 SDRAM controller SDRAM controller supports SDRAM JEDEC interface 16-bits wide, which allows interfacing to automotive SDRAM memory devices to handle high footprint applications. Such memory is cacheable, and can be accessed by DMA. 2.2.3 SQI executable in place The SQIO controller allows interfacing Serial Quad I/O flash memories. 2.2.4 Parallel memory interface FSMC static memory controller, provides a generic 16-bits parallel interface suitable to connect to NOR devices as well as SRAM and NAND devices. NOR memory space can be partitioned so to reserve a portion of the parallel NOR device to the Secure CAN Subsystem. 2.3 USB Telemaco2 family devices have one Host and one Dual role USB HS with embedded PHY, allowing connecting efficiently to mass storage devices, as well as portable devices (phones, pads). Along with USB connectivity, Telemaco2 family fully support USB charger specification. 2.4 Sound subsystem Telemaco2 family devices implement a sound subsystem which allows the routing and the rate conversion of the different audio sources. |
Số phần tương tự - STA1088 |
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Mô tả tương tự - STA1088 |
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