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LMX2315TMX bảng dữ liệu(PDF) 11 Page - National Semiconductor (TI) |
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LMX2315TMX bảng dữ liệu(HTML) 11 Page - National Semiconductor (TI) |
11 / 20 page Functional Description (Continued) SERIAL DATA INPUT TIMING TLW11766 – 8 Notes Parenthesis data indicates programmable reference divider data Data shifted into register on clock rising edge Data is shifted in MSB first Test Conditions The Serial Data Input Timing is tested using a symmetrical waveform around VCC 2 The test waveform has an edge rate of 06 Vns with amplitudes of 22V VCC e 27V and 26V VCC e 55V Phase Characteristics In normal operation the FC pin is used to reverse the polari- ty of the phase detector Both the internal and any external charge pump are affected Depending upon VCO characteristics FC pin should be set accordingly When VCO characteristics are like (1) FC should be set HIGH or OPEN CIRCUIT When VCO characteristics are like (2) FC should be set LOW When FC is set HIGH or OPEN CIRCUIT the monitor pin of the phase comparator input fout is set to the reference divider output fr When FC is set LOW fout is set to the programmable divider output fp VCO Characteristics TLW11766 – 9 PHASE COMPARATOR AND INTERNAL CHARGE PUMP CHARACTERISTICS TLW11766 – 10 Notes Phase difference detection range b2q to a2q The minimum width pump up and pump down current pulses occur at the Do pin when the loop is locked FC e HIGH 11 |
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