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ADC12DJ2700AAV bảng dữ liệu(PDF) 11 Page - Texas Instruments |
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ADC12DJ2700AAV bảng dữ liệu(HTML) 11 Page - Texas Instruments |
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11 / 146 page  11 ADC12DJ2700 www.ti.com SLVSEH9 – JANUARY 2018 Product Folder Links: ADC12DJ2700 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated (1) Measured to AGND. (2) Measured to DGND. (3) TI strongly recommends that CLK± be AC-coupled with DEVCLK_LVPECL_EN set to 0 to allow CLK± to self-bias to the optimal input common-mode voltage for best performance. TI recommends AC-coupling for SYSREF± unless DC coupling is required, in which case, the LVPECL input mode must be used (SYSREF_LVPECL_EN = 1). (4) TMSTP± does not have internal biasing that requires TMSTP± to be biased externally whether AC-coupled with TMSTP_LVPECL_EN = 0 or DC-coupled with TMSTP_LVPECL_EN = 1. (5) The ADC output code saturates when VID for INA± or INB± exceeds the programmed full-scale voltage (VFS) set by FS_RANGE_A for INA± or FS_RANGE_B for INB±. (6) Prolonged use above this junction temperature may increase the device failure-in-time (FIT) rate. (7) Tested up to 1000 hours continuous operation at Tj = 125°C. See the Absolute Maximum Ratings table for the absolute maximum operational temperature. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT VDD Supply voltage range VA19, analog 1.9-V supply(1) 1.8 1.9 2.0 V VA11, analog 1.1-V supply(1) 1.05 1.1 1.15 VD11, digital 1.1-V supply(2) 1.05 1.1 1.15 VCMI Input common-mode voltage INA+, INA–, INB+, INB–(1) –50 0 100 mV CLK+, CLK–, SYSREF+, SYSREF–(1)(3) 0 0.3 0.55 V TMSTP+, TMSTP–(1)(4) 0 0.3 0.55 VID Input voltage, peak-to-peak differential CLK+ to CLK–, SYSREF+ to SYSREF–, TMSTP+ to TMSTP– 0.4 1.0 2.0 VPP-DIFF INA+ to INA–, INB+ to INB– 1.0(5) VIH High-level input voltage CALTRIG, NCOA0, NCOA1, NCOB0, NCOB1, PD, SCLK, SCS, SDI, SYNCSE(1) 0.7 V VIL Low-level input voltage CALTRIG, NCOA0, NCOA1, NCOB0, NCOB1, PD, SCLK, SCS, SDI, SYNCSE(1) 0.45 V IC_TD Temperature diode input current TDIODE+ to TDIODE– 100 µA CL BG maximum load capacitance 50 pF IO BG maximum output current 100 µA DC Input clock duty cycle 30% 50% 70% TA Operating free-air temperature -40 85 ºC Tj Operating junction temperature 105(6)(7) ºC (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 6.4 Thermal Information THERMAL METRIC(1) ADC12DJ2700 UNIT AAV (FCBGA) 144 PINS RθJA Junction-to-ambient thermal resistance 25.3 °C/W RθJC(top) Junction-to-case (top) thermal resistance 1.1 °C/W RθJB Junction-to-board thermal resistance 8.2 °C/W ψJT Junction-to-top characterization parameter 0.1 °C/W ψJB Junction-to-board characterization parameter 8.2 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance n/a °C/W |
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