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AD7713SQ bảng dữ liệu(PDF) 1 Page - Analog Devices

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REV. D
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© 2004 Analog Devices, Inc. All rights reserved.
AD7713
LC2MOS
Loop-Powered Signal Conditioning ADC
FEATURES
Charge Balancing ADC
24 Bits No Missing Codes
0.0015% Nonlinearity
3-Channel Programmable Gain Front End
Gains from 1 to 128
2 Differential Inputs
1 Single-Ended High Voltage Input
Low-Pass Filter with Programmable Filter Cutoffs
Ability to Read/Write Calibration Coefficients
Bidirectional Microcontroller Serial Interface
Single-Supply Operation
Low Power (3.5 mW typ) with Power-Down Mode
(150
W typ)
APPLICATIONS
Loop Powered (Smart) Transmitters
RTD Transducers
Process Control
Portable Industrial Instruments
CMOS construction ensures low power dissipation, and a hard-
ware programmable power-down mode reduces the standby
power consumption to only 150
µW typical. The part is available
in a 24-lead, 0.3 inch wide, PDIP and CERDIP as well as a 24-
lead SOIC package.
PRODUCT HIGHLIGHTS
1. The AD7713 consumes less than 1 mA in total supply current,
making it ideal for use in loop-powered systems.
2. The two programmable gain channels allow the AD7713 to
accept input signals directly from a transducer removing a
considerable amount of signal conditioning. To maximize
the flexibility of the part, the high level analog input accepts
4
VREF signals. On-chip current sources provide excitation
for 3-wire and 4-wire RTD configurations.
3. No missing codes ensures true, usable, 24-bit dynamic range
coupled with excellent
±0.0015% accuracy. The effects of
temperature drift are eliminated by on-chip self-calibration,
which removes zero-scale and full-scale errors.
4. The AD7713 is ideal for microcontroller or DSP processor
applications with an on-chip control register, which allows
control over filter cutoff, input gain, signal polarity, and
calibration modes. The AD7713 allows the user to read and
write the on-chip calibration registers.
GENERAL DESCRIPTION
The AD7713 is a complete analog front end for low frequency
measurement applications. The device accepts low level signals
directly from a transducer or high level signals (4
VREF) and
outputs a serial digital word. It employs
-
conversion
technique to realize up to 24 bits of no missing codes
performance. The input signal is applied to a proprietary pro-
grammable gain front end based around an analog modulator.
The modulator output is processed by an on-chip digital filter.
The first notch of this digital filter can be programmed via the
on-chip control register, allowing adjustment of the filter cutoff
and settling time.
The part features two differential analog inputs and one single-
ended high level analog input as well as a differential reference
input. It can be operated from a single supply (AVDD and DVDD
at 5 V). The part provides two current sources that can be used
to provide excitation in 3-wire and 4-wire RTD configurations.
The AD7713 thus performs all signal conditioning and conver-
sion for a single-, dual- or three-channel system.
The AD7713 is ideal for use in smart, microcontroller-based
systems. Gain settings, signal polarity, and RTD current control
can be configured in software using the bidirectional serial port.
The AD7713 contains self-calibration, system calibration, and
background calibration options and also allows the user to read
and to write the on-chip calibration registers.
FUNCTIONAL BLOCK DIAGRAM
CHARGING BALANCING ADC
AUTO-ZEROED
-
MODULATOR
DIGITAL
FILTER
CLOCK
GENERATION
AD7713
AGND DGND
MCLK
OUT
MCLK
IN
AIN1(+)
AIN1(–)
AIN2(+)
REF
IN(+)
AVDD DVDD
AVDD
1 A
A = 1 – 128
STANDBY
AIN2(–)
REF
IN(–)
SYNC
RTD2
RTD1
PGA
AVDD
200 A
200 A
SERIAL INTERFACE
CONTROL
REGISTER
OUTPUT
REGISTER
MODE SDATA
A0
DRDY
TFS
RFS
SCLK
AIN3
INPUT
SCALING


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