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7 / 21 page 7/21 STM6321/6322/6821/6822/6823/6824/6825 OPERATION Reset Output The STM6xxx Supervisor asserts a reset signal to the MCU whenever VCC goes below the reset threshold (VRST), a watchdog time-out occurs, or when the Push-button Reset Input (MR) is taken low. Reset is guaranteed valid for VCC < VRST down to VCC =1V for TA = 0°C to 85°C. During power-up, once VCC exceeds the reset threshold an internal timer keeps reset low for the reset time-out period, trec. After this interval reset is de-asserted. Each time RST is asserted, it stays low for at least the reset time-out period (trec). Any time VCC goes below the reset threshold the internal timer clears. The reset timer starts when VCC returns above the reset threshold. Open Drain RST Output The STM6321/6322/6822 have an active-low, open drain reset output. This output structure will sink current when RST is asserted. Connect a pull- up resistor from RST to any supply voltage up to 6V (see Figure 8.). Select a resistor value large enough to register a logic low, and small enough to register a logic high while supplying all input cur- rent and leakage paths connected to the reset out- put line. A 10k Ω pull-up resistor is sufficient in most applications. Figure 8. STM6321/6322/6822 Open Drain RST Output with Multiple Supplies Note: 1. STM6322/6822 2. STM6321/6822 3. STM6321/6322 Push-button Reset Input (STM6322/6821/6822/ 6823/6825) A logic low on MR asserts reset. Reset remains asserted while MR is low, and for trec (see Figure 22., page 15) after it returns high. The MR input has an internal 52k Ω pull-up resistor, allowing it to be left open if not used. This input can be driven with TTL/CMOS-logic levels or with open-drain/ collector outputs. Connect a normally open mo- mentary switch from MR to GND to create a man- ual reset function; external debounce circuitry is not required. If MR is driven from long cables or the device is used in a noisy environment, connect a 0.1µF capacitor from MR to GND to provide ad- ditional noise immunity. MR may float, or be tied to VCC when not used. Watchdog Input (STM6321/6821/6822/6823/ 6824) The watchdog timer can be used to detect an out- of-control MCU. If the MCU does not toggle the Watchdog Input (WDI) within tWD (1.6sec), the re- set is asserted. The internal watchdog timer is cleared by either: 1. a reset pulse, or 2. by toggling WDI (high-to-low or low-to-high), which can detect pulses as short as 50ns. The timer remains cleared and does not count for as long as reset is asserted. As soon as reset is re- leased, the timer starts counting. Note: The watchdog function may be disabled by floating WDI or tri-stating the driver connected to WDI. When tri-stated or disconnected, the maxi- mum allowable leakage current is 10uA and the maximum allowable load capacitance is 200pF. Applications Information Watchdog Input Current. The WDI input is inter- nally driven through a buffer and series resistor from the watchdog counter. For minimum watch- dog input current (minimum overall power con- sumption), leave WDI low for the majority of the watchdog time-out period. When high, WDI can draw as much as 160µA. Pulsing WDI high at a low duty cycle will reduce the effect of the large in- put current. When WDI is left unconnected, the watchdog timer is serviced within the watchdog time-out period by a low-high-low pulse from the counter chain. AI09137 STM6XXX RST MR (1) WDI (2) RST (3) GND 10k VCC 5V System 5.0V 3.3V |
Số phần tương tự - STM6321RWY6F |
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Mô tả tương tự - STM6321RWY6F |
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